Trigger Framework Tutorial Talk

Presented by D. Edmunds         28-JUNE-2003



The purpose of this talk is the present the general features of the Trigger Framework
and its associated components in a Tutorial Presentation. This is done by showing the
functions of the Trigger Framework from the viewpoint of a number of different systems.
The following is an outline of this talk with references to the drawings.


DAQ Context and Beam Structure in Run IIA:

Scope of the System, Physical Location, Hardware Implementation:

The Trigger Framework is located in first floor Moving Counting House racks M122 and M123.
The VRB readout crate for the TFW and the SCL Hub-End are in rack M124. The layout of
these racks is shown in the following files.
The Routing Master is currently located in the bottom crate in rack M101.

The 3 racks that make up the Trigger Framework are shows in this picture.

One of the circuit boards that is used in the TFW is shown in this picture.
This card uses 18 FPGA's with the array of 16 FPGA's in the center providing the
tick by tick signal processing and the two FPGA's at the top providing the VME
interface and readout support. In total the TFW uses about 1600 FPGA's.

The location of the Trigger Framework, between the various Level 1 Trigger systems
and the SCL Hub-End, is shown in this drawing. This drawing illustrates the principal
L1 function of the Trigger Framework.

This talk does not cover the Level 1 Calorimeter Trigger with is also located in the
first floor MCH.

Level 1 Functions of the Trigger Framework:

Level 2 Functions of the Trigger Framework:

Routing Master Function of the Trigger Framework:

Readout to Level 3 Function of the Trigger Framework:

Trigger Control Computer Connections to the Trigger Framework:

The principal function of the Trigger Control Computer is to hide the internal
complexity of the TFW hardware from COOR. This allows COOR to control the TFW by
sending clear human readable ascii messages to TCC. For each message, TCC sends
an acknowledgment back to COOR. Each of these Command-Acknowledgment pairs has
an ID number. All of the COOR <-> TCC communications is logged by TCC. When TCC
receives a message from COOR it takes care of loading all of the TFW hardware
control registers that are required to implement COOR's request - then it sends
the acknowledgment back to COOR. Implementing even some simple commands from COOR,
e.g. de-allocating a L1 Specific Trigger, requires more that 10,000 I/O cycles to
various control registers in the TFW hardware. That is the complexity that is
being hidden from COOR by TCC.
The TCC also provides monitoring information from the TFW hardware to the online
systems that distribute, display, and log this data.

At cold start the TCC configures (i.e. puts the logic into) the 1600 FPGA's in the TFW.
The logic that is configured into these FPGA's is stored in files on TCC.

Scalers and Monitoring Functions of the Trigger Framework:

The TFW provides, via TCC, monitoring information that is used both to control the
operation of the running system (trigger rates and such) and also for Physics
analysis (Luminosity Monitoring data). This monitoring data comes from scalers
and state registers in the L1 and L2 parts of the TFW, from the Foreign Scalers,
and as state information from the SCL Hub-End.

The Foreign Scalers are scalers that are physically part of the TFW but that are
used to scale signals that come from outside of the TFW. Sources of these external
signals include: Level 2 processor state signals, and Level 0 Luminosity signals.
Many of these Foreign Scalers are "per BX scalers" which are banks of 159 scalers
that are setup to count some quantity separately for each of the 159 ticks in a
turn around the accelerator.

In the Control Room shifters most often see this monitoring information on the
DAQMON Display. Examples of information in the DAQMON display that comes from
the TFW via TCC are shown in the following.
A full list of the monitoring information that is available from TCC is given in this file.

Initialize and Cold Start of the Trigger Framework:

TFW Initialization is a process in which the TCC loads default quiescent values into
all the control registers in the TFW and zeros all the scalers in the TFW. COOR can
tell the TCC to Initialize the TFW. COOR understands the state of the TFW after it
has been initialized.

All of the messages from COOR to TCC that setup and control triggers make just
incremental changes in the overall state of the TFW. These messages do not
provide a complete context for the TFW. Thus after some days of operation in
which many thousands of messages have been exchanged it is useful to verify that
COOR's understanding of TFW's status matches what is actually running in the TFW
hardware. This is accomplished by telling COOR to ask TCC to Initialize the TFW.
We do a TFW Initialization before each store just to make certain that COOR and
the TFW hardware match each other. This is also a good time to zero the scalers.

Cold starting the TFW is only necessary if the power has been turned off and then
back on at D-Zero. The TFW is left running at all other times. Cold starting
involves first verifying that the Master Clock is running, then the performing the
various steps to configure logic into the FPGA's that make up the TFW, and finally
Initializing the TFW. The steps to cold start the TFW are completely described in
this file.



Updated 27-JUNE-2003 Dan Edmunds